Tool & Methodology Deployment Unlock the Full Potential of Your EDA Investment

At-A-Glance

• Accelerate your learning curve and design productivity
• Apply the latest tool features and methodologies to address specific design challenges like power and signal integrity
• Advance your design methods and practices
• Avoid project bottlenecks with expert design assistance

Value

• Deep Submicron Expertise: More than 70% of current design projects at 130nm or below
• Experience: More than 150 projects per year on average
• EDA Knowledge: Experts in Synopsys tools and flows

Deploying the latest releases of Synopsys’ tools and platforms provides tremendous gains in design productivity and quality of results through improved performance and new features. Just as most designs evolve to become more complex and rich with features, Synopsys technology continues to improve in capability and performance. But the complexity of designs and implementation challenges at new technology nodes often allows little time to optimize your design environment with the most advanced EDA features and methodologies.

Synopsys Professional Services has an extensive resume of design successes, and draws upon that experience and expertise using Synopsys tools to help customers solve nanometer design challenges. In fact, over two-thirds of our most recent engagements are at the 130-nanometer (nm) node or below. Synopsys design consultants continually receive extensive training to keep improving their skills and knowledge of Synopsys platforms. As you deploy Synopsys technology, Synopsys Professional Services will accelerate your learning curve and help you implement advanced features and new functionality to improve your design productivity and accelerate your tapeouts.

Accelerate Team Productivity

A wide variance in effort for all phases in the design cycle is demonstrated in industry case studies of 130nm designs.

Even at the same process node with chips of similar levels of complexity, there can be significant variation in productivity between design teams depending on their expertise with their EDA technology,as well as other factors.

Synopsys Professional Services can help you rapidly integrate Synopsys tools into your design flow to take immediate and full advantage of their capabilities and run time improvements. Examples of productivity-enhancing features in the Galaxy™ Design and Discovery™ Verification platforms include:

• Multi-Voltage design planning
• Multi-Vth optimization
• SI-aware hierarchical place and route
• Clock tree synthesis
• SystemVerilog assertions
• Dynamic power analysis
• Variation-aware STA
• On chip variation (OCV) analysis
• Hierarchical design planning

Case Studies: Improving Tool Productivity
A leading chip development team was encountering routing issues within a critical block of their SoC. The goal of the design team was to migrate part of the block routing to the top-level metal layer. However, existing runtimes for optimizing design blocks were unacceptable.

Synopsys design consultants assessed the current routing methodology and profiled the runtime bottlenecks of the current scripts. The profiling revealed a non-optimal routing methodology. As Synopsys Professional Services worked with the customer’s design team, they were able to optimize the methodology and scripts. The result was a 4X runtime improvement in routing while maintaining area and timing.

Another leading design team was concerned with the increased power consumption in their 90nm design. Synopsys design consultants worked with the design team to recommend and implement an advanced low power methodology and demonstrate the new methodology on a representative design block. The result was a 25% total power reduction on this design block.

Synopsys Professional Services: Helping to solve your toughest design challenges