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Overview
Synopsys' DesignWare® USB 2 PHY is a complete mixed-signal semiconductor intellectual property (IP) solution, designed for single-chip, USB 2.0 integration in both Device and Host applications.
The USB 2 PHY includes all the required logical, geometric and physical design files to implement USB 2.0 capability in a System-on-Chip (SOC) design and fabricate the design in the designated foundry.
The USB 2 PHY is available today in 90 nm, 130 nm and 180 nm CMOS digital logic processes. Alternatively, design services are available for porting the USB 2 PHY to other semiconductor processes.
The USB 2 PHY integrates high-speed, mixed-signal, custom CMOS circuitry compliant with the UTMI Specification (version 1.04).
The PHY supports the USB 2.0 480-Mbps protocol and data rate (high-speed), and is backward compatible to the USB 1.1 legacy protocol at 1.5-Mbps (low-speed) and 12-Mbps (full-speed).
The PHY's flexible architecture can be easily adapted for implementation of USB 2.0-compliant Host and Device.
The 40X acceleration in data rate offered by USB 2.0 improves the performance of many applications, including desktop video cameras,
portable storage, external CD-R/W, optical scanners, inkjet and laser printers, TV tuners, and audio speakers.
Highlights
- Complete mixed-signal physical layer (PHY) for single-chip USB 2.0 applications
- USB 2.0 Transceiver Macrocell Interface (UTMI) Specification compliant
- 8-bit interface at 60-MHz operation and 16-bit interface at 30-MHz operation chip
- Compatible with Synopsys' USB 2.0 Device and Host components
- USB 2.0 Device automatic switching between full- and high-speed modes
- Host Device automatic switching between full-, high- and low-speed modes
- Designed for minimal power dissipation for low-power and bus-powered devices
- Low-power design enables host enumeration of an unpowered device
- Sea-wall and decoupling structures reduce on-chip noise
- Suspend, Resume and Remote Wakeup mode support
- USB 2.0 test mode support
- Additional built-in analog testability features
- USB Implementers Forum certified
Interested in learning more about the USB 2.0 PHY? Download the actual USB 2 PHY model for a specific process and configuration.
Run some simulations and see how Synopsys' Hi-Speed Certified USB 2.0 PHYs can meet your SoC design needs. To request the evaluation package,
please go to Try-the-PHY.
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