coreBuilder

Overview
The DesignWare® coreBuilder product is part of the complete set of IP reuse tools available from Synopsys. With coreBuilder, designers can easily define the user configurable design parameters in the core and set the boundaries and cross dependencies of these parameters. Users can also easily capture clock information, define the hierarchy of the core, and set constraints of the internal and external ports contained in the core. This is done in a process-independent format that captures, not only the core, but also the design along with the core developer’s detailed knowledge of the core.

The core is then packaged into a coreKit with all of the associated design files such as verification files, testbench files and the documentation for the core. This provides a convenient format for the distribution, installation, and integration into the core integrator’s design and verification environment.

Features

• Built-in interfaces to Synopsys tools including:
• Design Compiler™
• Physical Compiler™
• Power Compiler™
• DC FPGA
• PrimeTime®
• Formality®
• VCS™
• TetraMAX®
• Support for packaging of mixed-language designs
• Flexible TCL interface for tool customization

Benefits

• Reduces IP integration costs by speeding time to verification
• Reduces IP support costs by capturing design intent
• Reduces script maintenance costs with built-in interfaces to Synopsys tools

 Datasheet

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