While extremely low in power consumption and area requirements, the DesignWare PCI Express PHY substantially exceeds the electrical specifications in such key performance areas as jitter and receive sensitivity. Synopsys provides designers with a complete, silicon-proven PCI Express 1.1 IP solution, including digital controllers, PHY and verification IP from a single vendor. Accessing all the IP from one provider allows designers to lower the risk and cost of integrating the 2.5 Gbps PCI Express interface into their high performance SoC designs.

DesignWare IP for PCI Express 1.1 PHY Datasheet
DesignWare IP for PCI Express Complete Solution Datasheet
 

• Highlights
• Products
• Downloads and Documentation

• Supports a wide range of configurations including 1.0v & 1.2v core supplies and 2.5v & 3.3v I/O supplies
• Supports a wide range of PCI Express bus widths (up to x16 support)
• Fully compliant with PCI Express 1.0a and 1.0a Errata and PIPE interface to ensure interoperability and ease of integration with higher protocol levels
• Supports all power-down states for highly efficient operation
• Full support for beaconing, receiver detection and electrical idle
• Reliable link operation across channel manufacturing operation (BER<10-18)
• Unique, built-in diagnostics enables visibility into link performance
• Automatic Test Equipment (ATE) test vectors for complete, at-speed production testing
• Silicon proven for popular 130nm, 90nm and 65nm processes with roadmap to 40nm processes

PCIE PHY, CP 65G, X1	STARs	Subscribe
PCIe PHY, CP 65G, x2	STARs	Subscribe
PCIE PHY, CP 65G, X4	STARs	Subscribe
PCIe PHY, CP 65G, x8	STARs	Subscribe
PCIE PHY, CP 65LP, x1	STARs	Subscribe
PCIe PHY, SMIC 130G, x1	STARs	Subscribe
PCIe PHY, SMIC 130G, x2	STARs	Subscribe
PCIe PHY, SMIC 130G, x4	STARs	Subscribe
PCIe PHY, TSMC 130G, x1	STARs	Subscribe
PCIe PHY, TSMC 130G, x4	STARs	Subscribe
PCIe PHY, TSMC 130G, x8	STARs	Subscribe
PCIe PHY, TSMC 130LV, x1	STARs	Subscribe
PCIe PHY, TSMC 130LV, x4	STARs	Subscribe
PCIe PHY, TSMC 130LV, x8	STARs	Subscribe
PCIe PHY, TSMC 55GP, x1	STARs	Subscribe
PCIe PHY, TSMC 55GP, x2	STARs	Subscribe
PCIe PHY, TSMC 55GP, x4	STARs	Subscribe
PCIe PHY, TSMC 65GP, x1	STARs	Subscribe
PCIe PHY, TSMC 65GP, x2	STARs	Subscribe
PCIe PHY, TSMC 65GP, x4	STARs	Subscribe
PCIe PHY, TSMC 65GP, x8	STARs	Subscribe
PCIe PHY, TSMC 65LP, x1	STARs	Subscribe
PCIe PHY, TSMC 65LP, x2	STARs	Subscribe
PCIe PHY, TSMC 90G, x1	STARs	Subscribe
PCIe PHY, TSMC 90G, x2	STARs	Subscribe
PCIe PHY, TSMC 90G, x4	STARs	Subscribe
PCIe PHY, TSMC 90G, x8	STARs	Subscribe

Description	PCIE PHY, CP 65G, X1
Name	dwc_pcie1phy-cp65g-x1
Version	3.7a
STARs	Open and/or Closed STARs
myDesignWare	Subscribe for Notifications
Product Type	Implementation IP
Documentation	Show Documents... Hide Documents... Complete Solution Datasheet DesignWare IP for PCI Express Complete Solution Datasheet Databook DesignWare Cores PCIe1 PHY For Common Platform 65-nm G (Wirebond/Flip-Chip) … Datasheet DesignWare IP for PCI Express 1.1 PHY Datasheet Success Stories Combination of Tools, IP and Services Help Teradici Achieve First Silicon Success Complete DesignWare IP for PCI Express Helps Reduce Power Consumption and Lower … Euphonic Technologies Achieves First Pass Silicon Success with High-Quality … High Quality DesignWare IP for PCI Express Helps SiCortex Enable First Pass Silicon … High Quality DesignWare IP for PCI Express, XAUI and DDR Lowers Power and Area for iVivity High Quality IP Saves Open-Silicon Three Months on Schedule Proven DesignWare IP for PCI Express Reduces Integration Risk and Speeds …
Download	dwc_pcie1phy-cp65g-x1
Description	PCIe PHY, CP 65G, x2
Name	dwc_pcie1phy-cp65g-x2
Version	3.7a
STARs	Open and/or Closed STARs
myDesignWare	Subscribe for Notifications
Product Type	Implementation IP
Documentation	Show Documents... Hide Documents... Complete Solution Datasheet DesignWare IP for PCI Express Complete Solution Datasheet Databook DesignWare Cores PCIe1 PHY For Common Platform 65-nm G (Wirebond/Flip-Chip) … Datasheet DesignWare IP for PCI Express 1.1 PHY Datasheet Success Stories Combination of Tools, IP and Services Help Teradici Achieve First Silicon Success Complete DesignWare IP for PCI Express Helps Reduce Power Consumption and Lower … Euphonic Technologies Achieves First Pass Silicon Success with High-Quality … High Quality DesignWare IP for PCI Express Helps SiCortex Enable First Pass Silicon … High Quality DesignWare IP for PCI Express, XAUI and DDR Lowers Power and Area for iVivity High Quality IP Saves Open-Silicon Three Months on Schedule Proven DesignWare IP for PCI Express Reduces Integration Risk and Speeds …
Download	dwc_pcie1phy-cp65g-x2
Description	PCIE PHY, CP 65G, X4
Name	dwc_pcie1phy-cp65g-x4
Version	3.7a
STARs	Open and/or Closed STARs
myDesignWare	Subscribe for Notifications
Product Type	Implementation IP
Documentation	Show Documents... Hide Documents... Complete Solution Datasheet DesignWare IP for PCI Express Complete Solution Datasheet Databook DesignWare Cores PCIe1 PHY For Common Platform 65-nm G (Wirebond/Flip-Chip) … Datasheet DesignWare IP for PCI Express 1.1 PHY Datasheet Success Stories Combination of Tools, IP and Services Help Teradici Achieve First Silicon Success Complete DesignWare IP for PCI Express Helps Reduce Power Consumption and Lower … Euphonic Technologies Achieves First Pass Silicon Success with High-Quality … High Quality DesignWare IP for PCI Express Helps SiCortex Enable First Pass Silicon … High Quality DesignWare IP for PCI Express, XAUI and DDR Lowers Power and Area for iVivity High Quality IP Saves Open-Silicon Three Months on Schedule Proven DesignWare IP for PCI Express Reduces Integration Risk and Speeds …
Download	dwc_pcie1phy-cp65g-x4
Description	PCIe PHY, CP 65G, x8
Name	dwc_pcie1phy-cp65g-x8
Version	3.6a
STARs	Open and/or Closed STARs
myDesignWare	Subscribe for Notifications
Product Type	Implementation IP
Documentation	Show Documents... Hide Documents... Complete Solution Datasheet DesignWare IP for PCI Express Complete Solution Datasheet Databook DesignWare Cores PCIe1 PHY For Common Platform 65-nm G (Wirebond/Flip-Chip) … Datasheet DesignWare IP for PCI Express 1.1 PHY Datasheet Success Stories Combination of Tools, IP and Services Help Teradici Achieve First Silicon Success Complete DesignWare IP for PCI Express Helps Reduce Power Consumption and Lower … Euphonic Technologies Achieves First Pass Silicon Success with High-Quality … High Quality DesignWare IP for PCI Express Helps SiCortex Enable First Pass Silicon … High Quality DesignWare IP for PCI Express, XAUI and DDR Lowers Power and Area for iVivity High Quality IP Saves Open-Silicon Three Months on Schedule Proven DesignWare IP for PCI Express Reduces Integration Risk and Speeds …
Download	dwc_pcie1phy-cp65g-x8
Description	PCIE PHY, CP 65LP, x1
Name	dwc_pcie1phy-cp65lp-x1
Version	3.5b
STARs	Open and/or Closed STARs
myDesignWare	Subscribe for Notifications
Product Type	Implementation IP
Documentation	Show Documents... Hide Documents... Complete Solution Datasheet DesignWare IP for PCI Express Complete Solution Datasheet Databook DesignWare Cores PCIe1 PHY For Common Platform 65-nm LP (Wirebond) Databook Datasheet DesignWare IP for PCI Express 1.1 PHY Datasheet Evaluation Databook DesignWare Cores PCIe1 PHY For Common Platform 65-nm LP (Wirebond) Evaluation … Success Stories Combination of Tools, IP and Services Help Teradici Achieve First Silicon Success Complete DesignWare IP for PCI Express Helps Reduce Power Consumption and Lower … Euphonic Technologies Achieves First Pass Silicon Success with High-Quality … High Quality DesignWare IP for PCI Express Helps SiCortex Enable First Pass Silicon … High Quality DesignWare IP for PCI Express, XAUI and DDR Lowers Power and Area for iVivity High Quality IP Saves Open-Silicon Three Months on Schedule Proven DesignWare IP for PCI Express Reduces Integration Risk and Speeds …
Download	dwc_pcie1phy-cp65lp-x1
Description	PCIe PHY, SMIC 130G, x1
Name	dwc_pcie1phy-smic130g-x1
Version	2.5c
STARs	Open and/or Closed STARs
myDesignWare	Subscribe for Notifications
Product Type	Implementation IP
Documentation	Show Documents... Hide Documents... Complete Solution Datasheet DesignWare IP for PCI Express Complete Solution Datasheet Databook DesignWare Cores PCIe1 PHY For SMIC 130-nm G (Wirebond) Databook Datasheets DesignWare IP for PCI Express 1.1 PHY Datasheet DesignWare IP for PCI Express 2.0 PHY Datasheet Evaluation Databook DesignWare Cores PCIe1 PHY For SMIC 130-nm G (Wirebond) Evaluation Databook Success Stories Combination of Tools, IP and Services Help Teradici Achieve First Silicon Success Complete DesignWare IP for PCI Express Helps Reduce Power Consumption and Lower … Euphonic Technologies Achieves First Pass Silicon Success with High-Quality … High Quality DesignWare IP for PCI Express Helps SiCortex Enable First Pass Silicon … High Quality DesignWare IP for PCI Express, XAUI and DDR Lowers Power and Area for iVivity High Quality IP Saves Open-Silicon Three Months on Schedule Proven DesignWare IP for PCI Express Reduces Integration Risk and Speeds …
Download	dwc_pcie1phy-smic130g-x1
Description	PCIe PHY, SMIC 130G, x2
Name	dwc_pcie1phy-smic130g-x2
Version	2.5c
STARs	Open and/or Closed STARs
myDesignWare	Subscribe for Notifications
Product Type	Implementation IP
Documentation	Show Documents... Hide Documents... Databook DesignWare Cores PCIe1 PHY For SMIC 130-nm G (Wirebond) Databook Evaluation Databook DesignWare Cores PCIe1 PHY For SMIC 130-nm G (Wirebond) Evaluation Databook Success Stories Combination of Tools, IP and Services Help Teradici Achieve First Silicon Success Complete DesignWare IP for PCI Express Helps Reduce Power Consumption and Lower … Euphonic Technologies Achieves First Pass Silicon Success with High-Quality … High Quality DesignWare IP for PCI Express Helps SiCortex Enable First Pass Silicon … High Quality DesignWare IP for PCI Express, XAUI and DDR Lowers Power and Area for iVivity High Quality IP Saves Open-Silicon Three Months on Schedule Proven DesignWare IP for PCI Express Reduces Integration Risk and Speeds …
Download	dwc_pcie1phy-smic130g-x2
Description	PCIe PHY, SMIC 130G, x4
Name	dwc_pcie1phy-smic130g-x4
Version	2.5c
STARs	Open and/or Closed STARs
myDesignWare	Subscribe for Notifications
Product Type	Implementation IP
Documentation	Show Documents... Hide Documents... Databook DesignWare Cores PCIe1 PHY For SMIC 130-nm G (Wirebond) Databook Evaluation Databook DesignWare Cores PCIe1 PHY For SMIC 130-nm G (Wirebond) Evaluation Databook Success Stories Combination of Tools, IP and Services Help Teradici Achieve First Silicon Success Complete DesignWare IP for PCI Express Helps Reduce Power Consumption and Lower … Euphonic Technologies Achieves First Pass Silicon Success with High-Quality … High Quality DesignWare IP for PCI Express Helps SiCortex Enable First Pass Silicon … High Quality DesignWare IP for PCI Express, XAUI and DDR Lowers Power and Area for iVivity High Quality IP Saves Open-Silicon Three Months on Schedule Proven DesignWare IP for PCI Express Reduces Integration Risk and Speeds …
Download	dwc_pcie1phy-smic130g-x4
Description	PCIe PHY, TSMC 130G, x1
Name	dwc_pcie1phy-tsmc130g-x1
Version	2.5b
STARs	Open and/or Closed STARs
myDesignWare	Subscribe for Notifications
Product Type	Implementation IP
Documentation	Show Documents... Hide Documents... Complete Solution Datasheet DesignWare IP for PCI Express Complete Solution Datasheet Databook DesignWare Cores PCIe1 PHY For TSMC 130-nm G (Wirebond/Flip-Chip) Databook Datasheets DesignWare IP for PCI Express 1.1 PHY Datasheet DesignWare IP for PCI Express 2.0 PHY Datasheet Evaluation Databook DesignWare Cores PCIe1 PHY For TSMC 130-nm G (Wirebond/Flip-Chip) Evaluation … Success Stories Combination of Tools, IP and Services Help Teradici Achieve First Silicon Success Complete DesignWare IP for PCI Express Helps Reduce Power Consumption and Lower … Euphonic Technologies Achieves First Pass Silicon Success with High-Quality … High Quality DesignWare IP for PCI Express Helps SiCortex Enable First Pass Silicon … High Quality DesignWare IP for PCI Express, XAUI and DDR Lowers Power and Area for iVivity High Quality IP Saves Open-Silicon Three Months on Schedule Proven DesignWare IP for PCI Express Reduces Integration Risk and Speeds …
Download	dwc_pcie1phy-tsmc130g-x1
Description	PCIe PHY, TSMC 130G, x4
Name	dwc_pcie1phy-tsmc130g-x4
Version	2.5b
STARs	Open and/or Closed STARs
myDesignWare	Subscribe for Notifications
Product Type	Implementation IP
Documentation	Show Documents... Hide Documents... Complete Solution Datasheet DesignWare IP for PCI Express Complete Solution Datasheet Databook DesignWare Cores PCIe1 PHY For TSMC 130-nm G (Wirebond/Flip-Chip) Databook Datasheets DesignWare IP for PCI Express 1.1 PHY Datasheet DesignWare IP for PCI Express 2.0 PHY Datasheet Evaluation Databook DesignWare Cores PCIe1 PHY For TSMC 130-nm G (Wirebond/Flip-Chip) Evaluation … Success Stories Combination of Tools, IP and Services Help Teradici Achieve First Silicon Success Complete DesignWare IP for PCI Express Helps Reduce Power Consumption and Lower … Euphonic Technologies Achieves First Pass Silicon Success with High-Quality … High Quality DesignWare IP for PCI Express Helps SiCortex Enable First Pass Silicon … High Quality DesignWare IP for PCI Express, XAUI and DDR Lowers Power and Area for iVivity High Quality IP Saves Open-Silicon Three Months on Schedule Proven DesignWare IP for PCI Express Reduces Integration Risk and Speeds …
Download	dwc_pcie1phy-tsmc130g-x4
Description	PCIe PHY, TSMC 130G, x8
Name	dwc_pcie1phy-tsmc130g-x8
Version	2.5b
STARs	Open and/or Closed STARs
myDesignWare	Subscribe for Notifications
Product Type	Implementation IP
Documentation	Show Documents... Hide Documents... Complete Solution Datasheet DesignWare IP for PCI Express Complete Solution Datasheet Databook DesignWare Cores PCIe1 PHY For TSMC 130-nm G (Wirebond/Flip-Chip) Databook Datasheets DesignWare IP for PCI Express 1.1 PHY Datasheet DesignWare IP for PCI Express 2.0 PHY Datasheet Evaluation Databook DesignWare Cores PCIe1 PHY For TSMC 130-nm G (Wirebond/Flip-Chip) Evaluation … Success Stories Combination of Tools, IP and Services Help Teradici Achieve First Silicon Success Complete DesignWare IP for PCI Express Helps Reduce Power Consumption and Lower … Euphonic Technologies Achieves First Pass Silicon Success with High-Quality … High Quality DesignWare IP for PCI Express Helps SiCortex Enable First Pass Silicon … High Quality DesignWare IP for PCI Express, XAUI and DDR Lowers Power and Area for iVivity High Quality IP Saves Open-Silicon Three Months on Schedule Proven DesignWare IP for PCI Express Reduces Integration Risk and Speeds …
Download	dwc_pcie1phy-tsmc130g-x8
Description	PCIe PHY, TSMC 130LV, x1
Name	dwc_pcie1phy-tsmc130lv-x1
Version	2.5b
STARs	Open and/or Closed STARs
myDesignWare	Subscribe for Notifications
Product Type	Implementation IP
Documentation	Show Documents... Hide Documents... Complete Solution Datasheet DesignWare IP for PCI Express Complete Solution Datasheet Databook DesignWare Cores PCIe1 PHY For TSMC 130-nm LV (Wirebond/Flip-Chip) Databook Datasheets DesignWare IP for PCI Express 1.1 PHY Datasheet DesignWare IP for PCI Express 2.0 PHY Datasheet Evaluation Databook DesignWare Cores PCIe1 PHY For TSMC 130-nm LV (Wirebond/Flip-Chip) Evaluation … Success Stories Combination of Tools, IP and Services Help Teradici Achieve First Silicon Success Complete DesignWare IP for PCI Express Helps Reduce Power Consumption and Lower … Euphonic Technologies Achieves First Pass Silicon Success with High-Quality … High Quality DesignWare IP for PCI Express Helps SiCortex Enable First Pass Silicon … High Quality DesignWare IP for PCI Express, XAUI and DDR Lowers Power and Area for iVivity High Quality IP Saves Open-Silicon Three Months on Schedule Proven DesignWare IP for PCI Express Reduces Integration Risk and Speeds …
Download	dwc_pcie1phy-tsmc130lv-x1
Description	PCIe PHY, TSMC 130LV, x4
Name	dwc_pcie1phy-tsmc130lv-x4
Version	2.5b
STARs	Open and/or Closed STARs
myDesignWare	Subscribe for Notifications
Product Type	Implementation IP
Documentation	Show Documents... Hide Documents... Complete Solution Datasheet DesignWare IP for PCI Express Complete Solution Datasheet Databook DesignWare Cores PCIe1 PHY For TSMC 130-nm LV (Wirebond/Flip-Chip) Databook Datasheets DesignWare IP for PCI Express 1.1 PHY Datasheet DesignWare IP for PCI Express 2.0 PHY Datasheet Evaluation Databook DesignWare Cores PCIe1 PHY For TSMC 130-nm LV (Wirebond/Flip-Chip) Evaluation … Success Stories Combination of Tools, IP and Services Help Teradici Achieve First Silicon Success Complete DesignWare IP for PCI Express Helps Reduce Power Consumption and Lower … Euphonic Technologies Achieves First Pass Silicon Success with High-Quality … High Quality DesignWare IP for PCI Express Helps SiCortex Enable First Pass Silicon … High Quality DesignWare IP for PCI Express, XAUI and DDR Lowers Power and Area for iVivity High Quality IP Saves Open-Silicon Three Months on Schedule Proven DesignWare IP for PCI Express Reduces Integration Risk and Speeds …
Download	dwc_pcie1phy-tsmc130lv-x4
Description	PCIe PHY, TSMC 130LV, x8
Name	dwc_pcie1phy-tsmc130lv-x8
Version	2.5b
STARs	Open and/or Closed STARs
myDesignWare	Subscribe for Notifications
Product Type	Implementation IP
Documentation	Show Documents... Hide Documents... Complete Solution Datasheet DesignWare IP for PCI Express Complete Solution Datasheet Databook DesignWare Cores PCIe1 PHY For TSMC 130-nm LV (Wirebond/Flip-Chip) Databook Datasheets DesignWare IP for PCI Express 1.1 PHY Datasheet DesignWare IP for PCI Express 2.0 PHY Datasheet Evaluation Databook DesignWare Cores PCIe1 PHY For TSMC 130-nm LV (Wirebond/Flip-Chip) Evaluation … Success Stories Combination of Tools, IP and Services Help Teradici Achieve First Silicon Success Complete DesignWare IP for PCI Express Helps Reduce Power Consumption and Lower … Euphonic Technologies Achieves First Pass Silicon Success with High-Quality … High Quality DesignWare IP for PCI Express Helps SiCortex Enable First Pass Silicon … High Quality DesignWare IP for PCI Express, XAUI and DDR Lowers Power and Area for iVivity High Quality IP Saves Open-Silicon Three Months on Schedule Proven DesignWare IP for PCI Express Reduces Integration Risk and Speeds …
Download	dwc_pcie1phy-tsmc130lv-x8
Description	PCIe PHY, TSMC 55GP, x1
Name	dwc_pcie1phy-tsmc55gp-x1
Version	3.5a
STARs	Open and/or Closed STARs
myDesignWare	Subscribe for Notifications
Product Type	Implementation IP
Documentation	Show Documents... Hide Documents... Databook DesignWare Cores PCIe1 PHY For TSMC 55-nm GP (Wirebond/Flip-Chip) Databook Datasheet DesignWare IP for PCI Express 1.1 PHY Datasheet Evaluation Databook DesignWare Cores PCIe1 PHY For TSMC 55-nm GP (Wirebond/Flip-Chip) Evaluation …
Download	dwc_pcie1phy-tsmc55gp-x1
Description	PCIe PHY, TSMC 55GP, x2
Name	dwc_pcie1phy-tsmc55gp-x2
Version	3.5a
STARs	Open and/or Closed STARs
myDesignWare	Subscribe for Notifications
Product Type	Implementation IP
Documentation	Show Documents... Hide Documents... Databook DesignWare Cores PCIe1 PHY For TSMC 55-nm GP (Wirebond/Flip-Chip) Databook Datasheet DesignWare IP for PCI Express 1.1 PHY Datasheet Evaluation Databook DesignWare Cores PCIe1 PHY For TSMC 55-nm GP (Wirebond/Flip-Chip) Evaluation …
Download	dwc_pcie1phy-tsmc55gp-x2
Description	PCIe PHY, TSMC 55GP, x4
Name	dwc_pcie1phy-tsmc55gp-x4
Version	3.5a
STARs	Open and/or Closed STARs
myDesignWare	Subscribe for Notifications
Product Type	Implementation IP
Documentation	Show Documents... Hide Documents... Databook DesignWare Cores PCIe1 PHY For TSMC 55-nm GP (Wirebond/Flip-Chip) Databook Datasheet DesignWare IP for PCI Express 1.1 PHY Datasheet Evaluation Databook DesignWare Cores PCIe1 PHY For TSMC 55-nm GP (Wirebond/Flip-Chip) Evaluation …
Download	dwc_pcie1phy-tsmc55gp-x4
Description	PCIe PHY, TSMC 65GP, x1
Name	dwc_pcie1phy-tsmc65gp-x1
Version	3.5a
STARs	Open and/or Closed STARs
myDesignWare	Subscribe for Notifications
Product Type	Implementation IP
Documentation	Show Documents... Hide Documents... Databook DesignWare Cores PCIe1 PHY For TSMC 65-nm GP (Wirebond/Flip-Chip) Databook Evaluation Databook DesignWare Cores PCIe1 PHY For TSMC 65-nm GP (Wirebond/Flip-Chip) Evaluation … Success Stories Combination of Tools, IP and Services Help Teradici Achieve First Silicon Success Complete DesignWare IP for PCI Express Helps Reduce Power Consumption and Lower … Euphonic Technologies Achieves First Pass Silicon Success with High-Quality … High Quality DesignWare IP for PCI Express Helps SiCortex Enable First Pass Silicon … High Quality DesignWare IP for PCI Express, XAUI and DDR Lowers Power and Area for iVivity High Quality IP Saves Open-Silicon Three Months on Schedule Proven DesignWare IP for PCI Express Reduces Integration Risk and Speeds …
Download	dwc_pcie1phy-tsmc65gp-x1
Description	PCIe PHY, TSMC 65GP, x2
Name	dwc_pcie1phy-tsmc65gp-x2
Version	3.5b
STARs	Open and/or Closed STARs
myDesignWare	Subscribe for Notifications
Product Type	Implementation IP
Documentation	Show Documents... Hide Documents... Databook DesignWare Cores PCIe1 PHY For TSMC 65-nm GP (Wirebond/Flip-Chip) Databook Evaluation Databook DesignWare Cores PCIe1 PHY For TSMC 65-nm GP (Wirebond/Flip-Chip) Evaluation … Success Stories Combination of Tools, IP and Services Help Teradici Achieve First Silicon Success Complete DesignWare IP for PCI Express Helps Reduce Power Consumption and Lower … Euphonic Technologies Achieves First Pass Silicon Success with High-Quality … High Quality DesignWare IP for PCI Express Helps SiCortex Enable First Pass Silicon … High Quality DesignWare IP for PCI Express, XAUI and DDR Lowers Power and Area for iVivity High Quality IP Saves Open-Silicon Three Months on Schedule Proven DesignWare IP for PCI Express Reduces Integration Risk and Speeds …
Download	dwc_pcie1phy-tsmc65gp-x2
Description	PCIe PHY, TSMC 65GP, x4
Name	dwc_pcie1phy-tsmc65gp-x4
Version	3.5a
STARs	Open and/or Closed STARs
myDesignWare	Subscribe for Notifications
Product Type	Implementation IP
Documentation	Show Documents... Hide Documents... Databook DesignWare Cores PCIe1 PHY For TSMC 65-nm GP (Wirebond/Flip-Chip) Databook Evaluation Databook DesignWare Cores PCIe1 PHY For TSMC 65-nm GP (Wirebond/Flip-Chip) Evaluation … Success Stories Combination of Tools, IP and Services Help Teradici Achieve First Silicon Success Complete DesignWare IP for PCI Express Helps Reduce Power Consumption and Lower … Euphonic Technologies Achieves First Pass Silicon Success with High-Quality … High Quality DesignWare IP for PCI Express Helps SiCortex Enable First Pass Silicon … High Quality DesignWare IP for PCI Express, XAUI and DDR Lowers Power and Area for iVivity High Quality IP Saves Open-Silicon Three Months on Schedule Proven DesignWare IP for PCI Express Reduces Integration Risk and Speeds …
Download	dwc_pcie1phy-tsmc65gp-x4
Description	PCIe PHY, TSMC 65GP, x8
Name	dwc_pcie1phy-tsmc65gp-x8
Version	3.2b
STARs	Open and/or Closed STARs
myDesignWare	Subscribe for Notifications
Product Type	Implementation IP
Documentation	Show Documents... Hide Documents... Databook DesignWare Cores PCIe1 PHY For TSMC 65-nm GP (Wirebond/Flip-Chip) Databook Evaluation Databook DesignWare Cores PCIe1 PHY For TSMC 65-nm GP (Wirebond/Flip-Chip) Evaluation … Success Stories Combination of Tools, IP and Services Help Teradici Achieve First Silicon Success Complete DesignWare IP for PCI Express Helps Reduce Power Consumption and Lower … Euphonic Technologies Achieves First Pass Silicon Success with High-Quality … High Quality DesignWare IP for PCI Express Helps SiCortex Enable First Pass Silicon … High Quality DesignWare IP for PCI Express, XAUI and DDR Lowers Power and Area for iVivity High Quality IP Saves Open-Silicon Three Months on Schedule Proven DesignWare IP for PCI Express Reduces Integration Risk and Speeds …
Download	dwc_pcie1phy-tsmc65gp-x8
Description	PCIe PHY, TSMC 65LP, x1
Name	dwc_pcie1phy-tsmc65lp-x1
Version	3.2a
STARs	Open and/or Closed STARs
myDesignWare	Subscribe for Notifications
Product Type	Implementation IP
Documentation	Show Documents... Hide Documents... Success Stories Combination of Tools, IP and Services Help Teradici Achieve First Silicon Success Complete DesignWare IP for PCI Express Helps Reduce Power Consumption and Lower … Euphonic Technologies Achieves First Pass Silicon Success with High-Quality … High Quality DesignWare IP for PCI Express Helps SiCortex Enable First Pass Silicon … High Quality DesignWare IP for PCI Express, XAUI and DDR Lowers Power and Area for iVivity High Quality IP Saves Open-Silicon Three Months on Schedule Proven DesignWare IP for PCI Express Reduces Integration Risk and Speeds …
Download	dwc_pcie1phy-tsmc65lp-x1
Description	PCIe PHY, TSMC 65LP, x2
Name	dwc_pcie1phy-tsmc65lp-x2
Version	3.2a
STARs	Open and/or Closed STARs
myDesignWare	Subscribe for Notifications
Product Type	Implementation IP
Documentation	Show Documents... Hide Documents... Success Stories Combination of Tools, IP and Services Help Teradici Achieve First Silicon Success Complete DesignWare IP for PCI Express Helps Reduce Power Consumption and Lower … Euphonic Technologies Achieves First Pass Silicon Success with High-Quality … High Quality DesignWare IP for PCI Express Helps SiCortex Enable First Pass Silicon … High Quality DesignWare IP for PCI Express, XAUI and DDR Lowers Power and Area for iVivity High Quality IP Saves Open-Silicon Three Months on Schedule Proven DesignWare IP for PCI Express Reduces Integration Risk and Speeds …
Download	dwc_pcie1phy-tsmc65lp-x2
Description	PCIe PHY, TSMC 90G, x1
Name	dwc_pcie1phy-tsmc90g-x1
Version	2.6a
STARs	Open and/or Closed STARs
myDesignWare	Subscribe for Notifications
Product Type	Implementation IP
Documentation	Show Documents... Hide Documents... Complete Solution Datasheet DesignWare IP for PCI Express Complete Solution Datasheet Databook DesignWare Cores PCIe1 PHY For TSMC 90-nm G (Wirebond/Flip-Chip) Databook Datasheets DesignWare IP for PCI Express 1.1 PHY Datasheet DesignWare IP for PCI Express 2.0 PHY Datasheet Evaluation Databook DesignWare Cores PCIe1 PHY For TSMC 90-nm G (Wirebond/Flip-Chip) Evaluation … Success Stories Combination of Tools, IP and Services Help Teradici Achieve First Silicon Success Complete DesignWare IP for PCI Express Helps Reduce Power Consumption and Lower … Euphonic Technologies Achieves First Pass Silicon Success with High-Quality … High Quality DesignWare IP for PCI Express Helps SiCortex Enable First Pass Silicon … High Quality DesignWare IP for PCI Express, XAUI and DDR Lowers Power and Area for iVivity High Quality IP Saves Open-Silicon Three Months on Schedule Proven DesignWare IP for PCI Express Reduces Integration Risk and Speeds …
Download	dwc_pcie1phy-tsmc90g-x1
Description	PCIe PHY, TSMC 90G, x2
Name	dwc_pcie1phy-tsmc90g-x2
Version	2.6a
STARs	Open and/or Closed STARs
myDesignWare	Subscribe for Notifications
Product Type	Implementation IP
Documentation	Show Documents... Hide Documents... Complete Solution Datasheet DesignWare IP for PCI Express Complete Solution Datasheet Databook DesignWare Cores PCIe1 PHY For TSMC 90-nm G (Wirebond/Flip-Chip) Databook Datasheets DesignWare IP for PCI Express 1.1 PHY Datasheet DesignWare IP for PCI Express 2.0 PHY Datasheet Evaluation Databook DesignWare Cores PCIe1 PHY For TSMC 90-nm G (Wirebond/Flip-Chip) Evaluation … Success Stories Combination of Tools, IP and Services Help Teradici Achieve First Silicon Success Complete DesignWare IP for PCI Express Helps Reduce Power Consumption and Lower … Euphonic Technologies Achieves First Pass Silicon Success with High-Quality … High Quality DesignWare IP for PCI Express Helps SiCortex Enable First Pass Silicon … High Quality DesignWare IP for PCI Express, XAUI and DDR Lowers Power and Area for iVivity High Quality IP Saves Open-Silicon Three Months on Schedule Proven DesignWare IP for PCI Express Reduces Integration Risk and Speeds …
Download	dwc_pcie1phy-tsmc90g-x2
Description	PCIe PHY, TSMC 90G, x4
Name	dwc_pcie1phy-tsmc90g-x4
Version	2.6a
STARs	Open and/or Closed STARs
myDesignWare	Subscribe for Notifications
Product Type	Implementation IP
Documentation	Show Documents... Hide Documents... Complete Solution Datasheet DesignWare IP for PCI Express Complete Solution Datasheet Databook DesignWare Cores PCIe1 PHY For TSMC 90-nm G (Wirebond/Flip-Chip) Databook Datasheets DesignWare IP for PCI Express 1.1 PHY Datasheet DesignWare IP for PCI Express 2.0 PHY Datasheet Evaluation Databook DesignWare Cores PCIe1 PHY For TSMC 90-nm G (Wirebond/Flip-Chip) Evaluation … Success Stories Combination of Tools, IP and Services Help Teradici Achieve First Silicon Success Complete DesignWare IP for PCI Express Helps Reduce Power Consumption and Lower … Euphonic Technologies Achieves First Pass Silicon Success with High-Quality … High Quality DesignWare IP for PCI Express Helps SiCortex Enable First Pass Silicon … High Quality DesignWare IP for PCI Express, XAUI and DDR Lowers Power and Area for iVivity High Quality IP Saves Open-Silicon Three Months on Schedule Proven DesignWare IP for PCI Express Reduces Integration Risk and Speeds …
Download	dwc_pcie1phy-tsmc90g-x4
Description	PCIe PHY, TSMC 90G, x8
Name	dwc_pcie1phy-tsmc90g-x8
Version	2.6a
STARs	Open and/or Closed STARs
myDesignWare	Subscribe for Notifications
Product Type	Implementation IP
Documentation	Show Documents... Hide Documents... Complete Solution Datasheet DesignWare IP for PCI Express Complete Solution Datasheet Databook DesignWare Cores PCIe1 PHY For TSMC 90-nm G (Wirebond/Flip-Chip) Databook Datasheets DesignWare IP for PCI Express 1.1 PHY Datasheet DesignWare IP for PCI Express 2.0 PHY Datasheet Evaluation Databook DesignWare Cores PCIe1 PHY For TSMC 90-nm G (Wirebond/Flip-Chip) Evaluation … Success Stories Combination of Tools, IP and Services Help Teradici Achieve First Silicon Success Complete DesignWare IP for PCI Express Helps Reduce Power Consumption and Lower … Euphonic Technologies Achieves First Pass Silicon Success with High-Quality … High Quality DesignWare IP for PCI Express Helps SiCortex Enable First Pass Silicon … High Quality DesignWare IP for PCI Express, XAUI and DDR Lowers Power and Area for iVivity High Quality IP Saves Open-Silicon Three Months on Schedule Proven DesignWare IP for PCI Express Reduces Integration Risk and Speeds …
Download	dwc_pcie1phy-tsmc90g-x8