INTERNATIONAL WEBSITES
|
SOLVNET
China
简体中文
Japan
日本语
United States
English
International Office Locations
Home
Tools
Verification
Blogs
Blogs
All Synopsys Blogs
A View from the Top: A System-Level Blog
Shift towards adoption of virtual platforms and ESL technologies.
Achim Nohl
On Verification: Software-to-Silicon
Exploring software-to-silicon verification.
Tom Borgstrom
Standards Blog: The Standards Game
Observation, information and experiences with technical standards.
Karen Bartleson
Verification Methodology Blog : Verification Martial Arts
Technical information and tutorials focusing on functional verification.
Janick Bergeron
All Synopsys Blogs
HSPICE SIG EVENT
Hear what industry leaders say about using HSPICE in today’s most challenging designs
HSPICE TIPS WEBINAR
Reduce simulation time without compromising HSPICE gold-standard accuracy
VCS PRODUCTIVITY WEBINAR
Reducing the Growing Verification Cycle
DAC 2011: VCS LUNCHEON VIDEOLOG
FastForward to Advanced Verification
DAC 2011: AMS DINNER VIDEOLOG
SPICE Up Your Chip: Achieving Fast, Accurate AMS Verification
News
Synopsys Collaborates with Sigrity to Accelerate Signal Integrity Analysis
eSilicon Selects Synopsys' Custom IC Design Solution and Tapes Out 28-nm Designs
LG Electronics Accelerates Analog Simulation by 10X with Synopsys CustomSim
Synopsys and GLOBALFOUNDRIES Collaborate to Deliver 65nm iPDKs
Synopsys Custom Design Solution Enables Moortec Semiconductor to Tape Out....
Synopsys Advances Mixed-Signal Verification with New CustomExplorer Ultra
Synopsys Mixed-signal Verification Solution Delivers 5X Speed-up at Amlogic
More
All Synopsys News
Articles
The New Economics of Verification
Generating AMD microcode stimuli using VCS constraint solver
Attacking Constraint Complexity: E Soft and SystemVerilog Default Constraints
Attacking Constraint Complexity: Verification IP Reuse
Verification alive and well at SoC virtual conference
SystemVerilog and VMM Overcome WiMAX Verification Challenges
Chip-verification and -design flow focuses on low power
More
Blogs
A View from the Top: A System-Level Blog
On Verification: Software-to-Silicon
Standards Blog: The Standards Game
Verification Methodology Blog : Verification Martial Arts
More
Success Stories
Etron Achieves First-Silicon Success of USB3.0 SoC Using Synopsys Proven Solutions
Emulex Enhances Design Productivity With Synopsys’ Advanced Verification Solutions
More
White Papers
MOS Device Aging Analysis with HSPICE and CustomSim
Understand and Avoid Electromigration (EM) & IR-drop in Custom IP Blocks
Using Digital Verification Techniques on Mixed-signal SoCs with CustomSim and VCS
Accelerating Analog Simulation with HSPICE Precision Parallel Technology
High-performance, Parallel Simulation with VCS Multicore Technology
Are We There Yet
A Fully Reusable Register/Memory Access Solution: Using VMM RAL
More
Webinars
Get the Most from Your HSPICE Simulation
Avoid EM & IR-drop Effects in Custom IP Blocks
VCS Productivity - Reducing the Verification Cycle
New Advancements in Verification Methodology
Regression and Analysis for Mixed-Signal Verification
Jitter Analysis Using HSPICE Transient Noise Techniques
New Levels of Productivity for USB 3.0 Verification
More
Videos
DAC 2011: Verification Lunch Panel: FastForward to Advanced Verification
DAC 2011: SPICE Up Your Chip: Achieving Fast, Accurate AMS Verification
DVCon 2011: Verification Lunch Panel: Industry Leaders Verify with Synopsys
HSPICE SIG: A Converging Analog World: Silicon, Package and System
Fall 2010: Modern Verification Challenges
DAC 2010: Industry Leaders Verification Luncheon
SNUG San Jose 2010: Functional Verification Vision Session
More
Training Courses
OpenVera Reference Verification Methodology (RVM/VMM)
SystemVerilog Testbench
SystemVerilog Verification Using VMM Methodology
Vera I
NanoSim
More
Product Guide
VMM CENTRAL
Discovery Platform
Eclypse Low Power Solution
SVP Cafe
SNUG
© 2012 Synopsys, Inc. All Rights Reserved.
Contact us
|
Locations
|
Privacy
|
Legal
|
RSS
