In March 2009, SNUG (Synopsys User Group) San Jose drew a large crowd of Synopsys users who gathered to hear from others about their experiences presented in papers, tutorials, and panels. The videos below provide you with a brief overview from customers who presented at San Jose SNUG. Visit the SNUG website for a complete list of IC Compiler papers and presentations.
|
Samsung Electronics
Hierarchical Design Implementation of a Complex SoC Using IC Compiler Harpreet Gill, Senior Engineering Manager, System LSI SoC R&D
This paper discusses the IC Compiler-based hierarchical design flow used to tape out a large, complex design at Samsung and also shares the best practices with the user community.
DOWNLOAD PAPER
DOWNLOAD PRESENTATION
|
|
Cisco Systems
Floorplanning and Feasibility Analysis Using IC Compiler Design Planning Kritti Pathak, Hardware Engineer
Learn how Design Planning in IC Compiler has been deployed at the block level to achieve quick, quality floorplans for designs where the macro area forms less than 80% of the core area.
DOWNLOAD PAPER
DOWNLOAD PRESENTATION
|