Addition of System-Level and In-Design Technology Support Further Enables a Path to Optimized Silicon

Rockchip Utilizes Chartered's 65nm Process and Synopsys' Technology and Services Portfolio For Tapeout of Next-Generation Multimedia SoC

Advanced Design Rule Support, Enhanced Low Power Automation, and New In-Design Manufacturing Compliance Capabilities Enable an Optimized Path to 28-nanometer Silicon

Flow addresses critical low power challenges of 65-nanometer designs with Synopsys' Eclypse Low Power Solution

Successful Tapeout of Large 7-Million-Instances Design was Critical in Meeting NEC Electronics' Time-to-Market Requirements

Comprehensive Flow Enhanced with Integration of Eclypse Low Power Solution Enabled by Unified Power Format

Power management capabilities enhanced with integration of Eclypse Low Power Solution

TSMC and Synopsys Address Low Power and DFM Challenges with Reference Flow 9.0

IC Compiler Enables Extremely Low-Power Design for Innovative Medical Device

Latest Design Flow Streamlines Development and Testing of Low Power Systems-on-a-Chip

Synopsys Technology and Expertise Help Set Up Design Center To Serve Customers Worldwide

Synopsys Tools, IP and Services Enable First-Silicon Success for Teradici's Complex SoC

Flow Includes Statistical Timing Analysis for Intra-die Variation, Automated DFM Hot-spot Fixing and New Dynamic Low-power Design Methodologies.

Complete 65-Nanometer Design Flow Recognized as Common Platform Technology Critical Success Factor

Flow Delivers a 5-10X Boost in Productivity for Mobile and Consumer Applications

Comprehensive Implementation, System-Level and Verification Solutions Speed Time-to-Market for STi7200 Dual-Video-Stream Device

Synopsys to Directly License Foundry-Portable PowerPC Cores

Hua Hong NEC Chooses Synopsys as Primary EDA Provider

Reference Design Flow Features New Low Power and DFM Capabilities Based on Synopsys' Galaxy™ Design and Discovery ™ Verification Platforms

Common Platform Technology Reference Flow Adds Critical Area Design-for-Manufacturing Capability in IC Compiler

Reference Flow 7.0 Incorporates Latest Technologies for Low Power and Yield Optimization to Address 65-nanometer Design Challenges

Sunplus Selects Synopsys Professional Services to Achieve Aggressive Schedule and Cost Goals

Enhanced Methodology Accelerates Time-to-Market for ARM Processors, Including Next-generation ARM Cortex-R4 Processor

Production-Ready Environment Integrates Proven RTL-to-GDSII Flow With New Utilities to Improve Design Productivity and Tapeout Predictability