Programmable devices are on the rise. Performance may headline product announcements, but battery life and chip cost for consumer mobile products are just as important as power supply and cooling costs for teraflop-capable servers. As a result, attaining an optimized CPU core implementation has never been more important.

A variety of interacting factors affect the performance, power and area that can be achieved in a processor core implementation. The number of CPU cores, the size and organization of cache memories, the underlying silicon process and the range of operating conditions are some of the more common parameters that impact core hardening results. But other factors, such as standard-cell libraries, test and debug features, power control circuits, clock noise and on-chip variation also play an important role in CPU core implementation (please refer to this white paper for a detailed discussion of the many interacting parameters that determine the optimum implementation for a given application).

Synopsys Professional Services consultants have significant experience implementing and optimizing leading CPU cores. Leveraging leading-edge tools from the Galaxy™ Implementation Platform, we deliver project support from the earliest phases of design planning through tape-out, identifying and resolving bottlenecks while transferring methodology and best practices throughout the engagement.

To get more information on how we can customize our services for you, please contact us or call your local Synopsys sales representative.