| IBM's 'Fab Club' Enters High-K Era |
Getting a jump on its rivals, IBM Corp.'s ''fab club'' and others have made good on their previous promises. The group, including ARM, IBM, Samsung Electronics, GlobalFoundries and Synopsys, have announced the delivery of its 32-/28-nm process and design platform, based on high-k and metal gates.
Jun 14, 2010 |
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| Synopsys Shows Off Optimized Lynx Design For 32/28nm Technology |
Synopsys has announced that its Lynx Design System has provided the platform to reduce risk and total development cost for advanced 32/28nm system-on-chip (SoC) designs.
Jun 14, 2010 |
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| Semi ecosystem collaboration more critical than ever |
With the industry still recovering from the recession, design tool and methodology innovation is continuing to shift to tight collaboration between semiconductor companies, EDA vendors, and foundries.
Mar 02, 2010 |
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| As design goes global, tools get more critical |
Disaggregation of the IC and system design chain toward a specialty model has included a growing reliance on outsourcing. That has created an opportunity for developers of advanced tool suites to field design environments in which the "best of the best"--from anywhere around the globe--can be assembled for round-the-clock development of fully optimized designs
Aug 10, 2009 |
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| Insight Magazine: Building Productive and Predictable Design Flows |
Neel Desai, product marketing manager, Synopsys, outlines Synopsys’ Lynx Design System, a production-ready design environment for faster, reduced-risk chip development.
Jul 03, 2009 |
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| Chip Design: Going Graphical to Better Manage Design Schedules |
In the course of the design and analysis of a typical 65 nanometer (nm) systems-on-chip (SoC) project, it’s not uncommon to generate more than two to three terabytes of data for even moderately-sized designs.
May 01, 2009 |
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| Electronic Design: IC development platform integrates proven tools, best practices |
The economy has put IC design houses in a severe bind. Even as getting new products to market on time becomes more critical than ever, most design projects run late. This owes largely to the fact that system-on-a-chip (SoC) design complexity, in gate-count terms, grows at a rate of 20% or more per year. Further impacting the design complexity growth is the need to incorporate a growing roster of power-management circuitry.
Apr 20, 2009 |
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| Gabe on EDA: Software-as-a-service in EDA – Can Lynx help? |
Gary Smith has published a short research paper authored by Sharon Tan that explores one possible avenue to increase EDA revenue by expanding the service aspect of the business.
Mar 30, 2009 |
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| EETimes: De Geus touts new products, says ICs will rebound |
Delivering the keynote address at a user group event here Monday (March 16), Aart de Geus, chairman and CEO of Synopsys Inc., touted the company’s new products and said the semiconductor industry would remain critical to the world after emerging from a recession expected to be long and deep.
Mar 17, 2009 |
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| EDA DesignLine: Synopsys releases Lynx to manage IC design |
Synopsys is making available an automated chip development environment that the company says combines an RTL-to-GDSII design flow with productivity-enhancing features to accelerate chip development while mitigating the risks of designing at new process nodes.
Mar 16, 2009 |
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| EDN: Synopsys Lynx updates Pilot approach to managing an IC design flow |
Synopsys today unveiled Lynx, a package of software intended to help automate the execution, oversight, and management of chip design flows. Like its predecessor Pilot, Lynx is not a design tool or a flow, but a package of recommended flow, database, supervisory tools and services intended to improve productivity—and by the way, make it easy to decide on a turnkey all-Synopsys tool set.
Mar 16, 2009 |
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