“We were facing a very limited market window and the DesignWare IP for PCI Express enabled us to tape-out on schedule with timing closure, and achieve first-pass silicon success.”
Phil Lowe, Director of ASIC, Stretch

“Synopsys’ proven DesignWare Verification IP gave us a huge schedule advantage by enabling us to develop the verification environment in just three months versus the six in our previous project.”
Samir Patel, Sr. Design and Verification Engineer, Tarari

High Quality, Great Support and Latest Feature Set Made DesignWare IP the Right Choice for Cavium
Anil Jain, Vice President of IC Engineering, Cavium Networks

“Synopsys’ complete, integrated PCI Express IP solution enabled us to easily implement over 100 PCI Express Root Complex ports in our system. The DesignWare IP worked, it worked the first time, and we look forward to working with Synopsys again on our next design.”
Bob Supnik, Vice President of Engineering, SiCortex

“We chose Synopsys IP because of its top notch quality and reliability. The IP was also smaller and lower in power, compared to other vendors we evaluated, which helped us to achieve our power and reliability targets.”
Jim O’Connor, Senior VP of Engineering, iVivity

“We received first samples in early December, and immediately had critical high-speed interconnect IP and processor cores running successfully. Within another week, our most complex logic was fully operational. Having access to Synopsys’ industry leading tools, IP, and services enabled Teradici to achieve first silicon success.”
Maher Fahmi, VP Silicon Engineering, Teradici

DesignWare IP for PCI Express Reduces Time to Market by up to Six Months
Kamran Azadet, Director of PHY Architecture and IP Development, Agere Systems

“In selecting an IP supplier we look at quality, features, and support. Synopsys came out on top in all three areas by providing production-proven and certified IP with the required set of features. We also appreciated the responsiveness of the expert support team, who was there for us every step of the way.”
Hans Bouwmeester, Director of IP, Open-Silicon

“We were facing a very limited market window and the DesignWare IP for PCI Express enabled us to tape-out on schedule with timing closure, and achieve first-pass silicon success.”
Phil Lowe, Director of ASIC, Stretch

Leading DesignWare IP for PCI Express Helps Achieve High Performance Goals for Game Physics Processor
Otto Schmid, Vice President of Hardware Engineering, AGEIA

“In selecting an IP supplier we look at quality, features, and support. Synopsys came out on top in all three areas by providing production-proven and certified IP with the required set of features. We also appreciated the responsiveness of the expert support team, who was there for us every step of the way.”
Hans Bouwmeester, Director of IP, Open-Silicon

“Time-to-market was a top priority for us. With the DesignWare USB 2.0 PHY IP, we were able to achieve first pass silicon success and meet our project schedule.”
Jason Chao, Senior Director, HiSilicon Technologies

“You need a supplier you can count on to create a verification environment that’s trustworthy. Synopsys has that kind of credibility.”
Avi Ganor, Vice President of R&D, Commex

“Synopsys’ proven DesignWare Verification IP gave us a huge schedule advantage by enabling us to develop the verification environment in just three months versus the six in our previous project.”
Samir Patel, Sr. Design and Verification Engineer, Tarari

“We received first samples in early December, and immediately had critical high-speed interconnect IP and processor cores running successfully. Within another week, our most complex logic was fully operational. Having access to Synopsys’ industry leading tools, IP, and services enabled Teradici to achieve first silicon success.”
Maher Fahmi, VP Silicon Engineering, Teradici

“We chose Synopsys because it was the only IP supplier that provided both a USB 2.0 PHY and controller as a complete solution, and because of the quality we saw in Synopsys DesignWare Libraries on previous projects.”
Mario Manninger, Head of Engineering for the Communications business unit, Austriamicrosystems

“Time-to-market was a top priority for us. With the DesignWare USB 2.0 PHY IP, we were able to achieve first pass silicon success and meet our project schedule.”
Jason Chao, Senior Director, HiSilicon Technologies

“I believe VCS Verification Library IP helped us identify design flaws that would have been missed had we relied on other methods to validate our AMBA-based interfaces. VCS Verification Library IP allowed us to avoid last minute repairs or, worse yet, a silicon re-spin.”
David Jenne, Design Verification Manager, Pixim, Inc.

“We set out to build a very high quality, full-featured PCI Express solution that we could bring to market quickly with full confidence that our implementation would pass the PCI Express standards compliance checklist. Synopsys clearly demonstrated it was up to the task, and delivered to us even better than promised.”
Kamran Azadet, Director of PHY Architecture and IP Development, Agere Systems

“We were facing a very limited market window and the DesignWare IP for PCI Express enabled us to tape-out on schedule with timing closure, and achieve first-pass silicon success.”
Phil Lowe, Director of ASIC, Stretch

“Lowering the power consumption for our chipset was our main goal. Synopsys provided us with a complete, PCI Express IP solution that helped us deliver a product that is extremely competitive in both power and area.”
Rick Jeng, Executive Vice President, Ralink Technology