2011 Conference at a Glance

Time	Description
8:30-9:00	Registration and Breakfast
9:00-9:15	Welcome: Eran Arad, SanDisk, SNUG Israel User Chair
9:15-10:15	Keynote Address: Ken Nelsen, Vice President, Global Technical Services, Synopsys
10:15-10:45	Guest Keynote: Eran Rotem, Associate Vice President of Design Technology, Marvell Israel
10:45-11:15	Break
	Verification	System Level Design & FPGA	IP	Implementation A	Implementation B	AMS & Test
11:15-12:40	A1 Tutorial Power Aware Verification Methodology	A2 & A3 Tutorial & Vision Session System Level Design: "A view from the top"		A4 Tutorial & User Experience Design productivity with DC Explorer and SPG flow	A5 Tutorials & User Paper STA updates and user experience	A6 Tutorials Analog Mixed-Signal
12:40-1:30	Lunch
1:30-3:00	B1 Tutorial Advanced verification methodologies with UVM 1.0	B2 Tutorial & User Experience FPGA and IP experience	B3 Tutorial Reducing Static Power Consumption in Advanced SoC Designs Using Long and Multi-Channel Logic Libraries	B4 Tutorial A scalable methodology for fast convergence of large designs	B5 User Papers Low Power & STA Experience	B6 Tutorial & User Experience Custom Design
3:00-3:20	Break
3:20-4:50	C1 User Papers Verification Experience	C2 User Experience & Tutorial System Level Design	C3 Tutorial Designing Mobile Multimedia SoCs with Low-Power, High-Performance IP Solutions	C4 & C5 Vision Session Low Power Design: How Long Until We Hit the Wall?		C6 Tutorial & User Paper Design for Test
4:50-5:00	Best Paper Award Farewell Cocktail and Prize Drawing