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SNUG India 

Bangalore Leela Palace Hotel 

Bangalore, India
June 23-24, 2010

More than 2000 of your fellow Synopsys technology users attended the annual SNUG India conference on June 23-24, 2010. We hope to see you next year in 2011!

 

1st Place - Best Paper; Custom Design and AMS Verification Finding Power-up Issues in Memories using ESP-CV
Premkumar, Sanjeev Suman [Texas Instruments], Rakesh Shenoy [Synopsys]
PaperPresentation

1st Place - Best Paper; FPGA and System Design Efficient Prototyping of Multi-Million Gate SoCs using Accelerated Synthesis Feature of Synplify Premier
Sabyasachi Dey, Amit Siroya [Qualcomm]
PaperPresentation

1st Place - Best Paper; IC Design: Physical Design Physical Implementation Challenges for a Very Large, Channel-Dominated, Multi-Clock Design in 45nm
Namit Varma, Madhusudan Rajagopal, Veena Radhakrishnan [Achronix]
PaperPresentation

1st Place - Best Paper; IC Design: Signoff On Analysis & Development of Sign-Off Quality Clock Gating Effectiveness Metrics
Jairam Sukumar, Udayakumar H, Rajagopal K A [Texas Instruments], Maria Tovey [Synopsys]
PaperPresentation

1st Place - Best Paper; IC Design: Synthesis and Test Achieving massive multi-site testing without compromising on the test quality - Is Serializer the solution?
Malav Shah, Claus kuntzsch, Nikolaus Mittermaier [Texas Instruments]
PaperPresentation

1st Place - Best Paper; IC Verification Verification of Mixed-Signal Designs using System-Verilog Assertions in Co-simulation
Somasunder Kattepura Sreenath, Sandeep Tare [Texas Instruments]
PaperPresentation

ProceedingsDownload 2010 proceedings
PAPERS (24 MB) PRESENTATIONS (30 MB) TUTORIALS (31 MB)

 
SNUG is committed to making the best possible use of your time and delivering practical information you can take away and apply to your current project as well as future designs. If you cannot attend the full program, please feel free to register only for the sessions that are most useful to you.

SNUG thanks the members of the Technical Committee who volunteer their time and expertise to ensure SNUG’s technical quality, local perspective and value to the users of Synopsys tools and technology.

AMS:
Rituparna Mandal, TI
Raghu Kodali, ARM
Chittoor Parthasarathy, ST

FPGA:
Phaneesh H, Xilinx
Ameet Bagwe, TI

Physical Design:
Naveen Raina, ST
Sabeesh Balgangadharan, Wipro
Sudheer Reddy, ST

Signoff:
Suneel Verma, Wipro
Shirish Agrawal, ST-EMP
Raghav Yerramreddikalva, Intel

Synthesis:
Vishvanathan Nenmeli, Intel
Adarsh Kalliat, nVidia
Upendra Tripathi, TI

Test:
Srivaths Ravi, TI
Ajay Kumar DIMRI, ST
Venkatasubramanian Seetharaman, Wipro

Verification:
Prabhanjan, nVidia
Pankaj Chhajer, LSI - Pune
Ashok Natarajan, Broadcom



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